Power is at the forefront of semiconductor chip design. As chips get smaller, current density and design complexity compound power and thermal challenges. Performance, power and capacity requirements of mobile electronics and high performance computing — such as CPUs, GPUs and the energy efficiency requirements of power management integrated circuits (PMICs) — necessitate a comprehensive power methodology that is effective in identifying and addressing issues, starting early in the design process and continuing all the way to sign-off. Power and thermal hotspot identification requires analysis of real-life stimuli such as operating system and firmware boot-up and ultra-high definition video frames.

ANSYS 18 for semiconductor design enables you to create chips using the most advanced semiconductor process technology, starting at the register transfer level (RTL) through post-layout chip sign-off, to ensure the highest possible power integrity and reliability across chip, package and system.

Ensure chip reliability and integrity with foundry-certified RedHawk

At ANSYS 18, ANSYS RedHawk has been certified by all leading foundries, including TSMC, for voltage (IR) and electromigration (EM) sign-off on their 7nm process node. The latest release of RedHawk also supports analysis for advanced 3DIC designs that are implemented in InFO-WLP (Fan-out Wafer Level Packaging) from TSMC. InFO packages require the analysis of complex package geometries that are implemented through silicon interposers. Redhawk also supports integrated co-analysis of all the chips in the package within a unified environment.




Chips using advanced process technology

Totem enables advanced thermal and reliability analysis on PMIC and photonic designs

ANSYS Totem now gives you a comprehensive analysis framework for complex and highly integrated power management integrated circuits (PMIC) and photonic designs with detailed chip level analysis and chip-package co-analysis support. It is certified down to 7nm and provides a single pass sign-off flow for power and signal line electromigration and self-heat analysis.

PowerArtist delivers 1,000x faster power profiling of real applications

Designed for millions of cycles of design activity, PowerArtist register transfer level (RTL) and gate power profiling deliver 1,000x faster performance, enabling early analysis of system-level application scenarios such as operating system boot-up and high-definition video frames. Power-critical blocks and windows identified through early power profiling enable high-impact design decisions to reduce power consumption, while also enabling early chip-package-system power integrity and thermal analysis, which can prevent costly surprises late in the design flow

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